Verilog Code for BCD Counter

BCD Counter:

Binary counters are counters that go through a binary sequence and an n-bit binary
counter is made of “n” number of flip-flops counting from 0 to 2n-1.BCD counters follow a sequence of ten states and count using BCD numbers from 0000 to 1001 and then returns to 0000 and repeats.
So, here in BCD counter, if reset=1, output=0, else if  whenever our output is less than or equal to 9, output gets incremented by 1.

Verilog Code for BCD Counter:

module bcd_counter(reset,clk,out); 
input reset,clk; 
output reg[3:0]out; 
initial out=0; 
always@(posedge clk) 
begin  
if (reset) 
begin  
out<=3'b0; 
end  
else if(out<=9)     
begin      
out<=out+1;     
end 
else   
out<=0; 
end 
endmodule

OUTPUT:


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