Verilog Code for Full Adder using Half Adder

 

Full Adder: 

A full adder is a digital circuit that performs addition of three bits. Full adders are implemented with logic gates in hardware. A full adder adds three one-bit binary numbers, two operands and a carry bit. The adder outputs two numbers, a sum and a carry bit. The term is contrasted with a half adder, which adds two binary digits.

Fig 1: Truth table of Full Adder

Fig 2: Logic diagram of Full Adder using Half Adder

Verilog Code for Full Adder:

module fulladder(Sum,Cout,A,B,Cin);

output Sum,Cout;

input A,B,Cin;

wire w1,w2,w3;

ha h1(w1,w2,A,B);

ha h2(Sum,w3,w1,Cin);

or o1(Cout,w2,w3);

endmodule

OUTPUT:

Fig 3: Output of Full Adder