Verilog Code for Half Adder

 

Half Adder:

A half adder is a type of adder, an electronic circuit that performs the addition of numbers. The half adder is able to add two single binary digits and provide the output plus a carry value. It has two inputs, called A and B, and two outputs S (sum) and C (carry). The common representation uses a XOR logic gate and an AND logic gate.

Fig 1: Truth Table of Half Adder

Fig 2: Logic diagram of Half Adder

Verilog Code for Half Adder: 

module ha(sum,carry,a,b);

output sum,carry;

input a,b;

xor x1(sum,a,b);

and a1(carry,a,b);

endmodule

OUTPUT: