Verilog Code for Parity Calculation(function)

Parity Calculation(function):

This function calculates parity of 32-bit address and returns the value. In 1st invocation of calc_parity, the returned value was used to set the reg parity. In the 2nd invocation, the value returned was directly used inside $display task. Thus, the returned values is placed wherever the function was invoked. 

Verilog Code for Parity Calculation(function):

//define module containing func cal_parity 
module parity(addr,parity); 
input[31:0] addr; 
output reg parity;  

//compute newparity whenever address value changes 
always@(addr) 
begin 
parity= calc_parity(addr); //first invocation of calc_parity 
$display("parity calculated=%b",calc_parity(addr));  
//second invocation of calc_parity 
end   
//define the parity calc func 
function calc_parity; 
input [31:0]address; 
begin  
//set the o/p value  
calc_parity=^address;  //return the xor of all address bits. 
$display("address=%d",address); 
end  
endfunction  
endmodule  

OUTPUT:


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