Verilog Code for BCD to Seven Segment Decoder using Case Statement

BCD to Seven Segment Decoder:

Seven segment display is the most common device used for displaying digits and alphabet. The binary information can be displayed in the form of decimal using this Seven segment display. Seven segment display works, by glowing the required respective LEDS in the numeral. The display is controlled using pins that are left freely. In Binary Coded Decimal (BCD) encoding scheme each of the decimal numbers (0-9) is represented by its equivalent binary pattern (which is generally of 4-bits). Whereas, seven segment display is an electronic device which consists of seven Light Emitting Diodes (LEDs) arranged in some definite pattern, which is used to display decimal numbers( as input  BCD i.e., 0-9).  
Seven segment display does not work by directly supplying voltage to different segments of LEDs. First, our decimal number is changed to its BCD equivalent signal then BCD to seven segment decoder converts that signals to the form which is fed to seven segment display. This BCD to seven segment decoder has four input lines (A, B, C and D) and 7 output lines (a, b, c, d, e, f and g), this output is given to seven segment LED display which displays the decimal number depending upon inputs.

Verilog Code for BCD to Seven Segment Decoder using Case Statement:

module bcdtoseven(a,r); 
input [3:0]a; 
output reg[6:0]r; 
always@(a)     
begin 
case(a)   
4'b0000:r=7'b0000001;   
4'b0001:r=7'b1001111;   
4'b0010:r=7'b0010010;   
4'b0011:r=7'b0000110;   
4'b0100:r=7'b1001100;   
4'b0101:r=7'b0100100;   
4'b0110:r=7'b0100000;   
4'b0111:r=7'b0001111;   
4'b1000:r=7'b0000000;   
4'b1001:r=7'b0000100; 
endcase 
end 
endmodule

OUTPUT:


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