Verilog Code for Priority Encoder

Priority Encoder:

A priority encoder provide n bits of binary coded output representing the position of the highest order active input of 2n inputs. If two or more inputs are high at the same time, the input having the highest priority will take precedence. 

We have designed the priority encoder using the truth table entry. This is a 4:2 priority encoder as it takes four input and two output. Outputs are produced when they satisfy the above condition defined in assign statement. 

Verilog Code for Priority Encoder:

module priority_encoder(y1,y2,i0,i1,i2,i3); 

output y1,y2; 

input i0,i1,i2,i3; 

wire x; 

not n1(x,i2); 

assign y1=(i2|i3); 

assign y2=(i3|(x&i1)); 

endmodule  

OUTPUT: